DR. HOWARD KALTER (1997) pdf

Steven Willard Arms
Address:
168 Village Drive
Colchester, VT 05446
Email: hkalter@ieee.org

Telephone:
H: (802) 879-0941
F: (802) 878-5372

Education:
BSEE with Honors University of Florida, Dec 1966
MSEE University of Florida, Mar 1968
Degree of Engineer University of Florida, Jun 1970
Masters Thesis Analysis of High-Powered Pulsed X-Radiation
From a Non-Equilibrium Plasma
Doctorial Dissertation A System for High-Accuracy Noise Measurements

Professional Experience:
1/99-present HLK, Inc., Colchester, Vermont
Technical consulting on semiconductor design and expert witness on patent infringement litigations.
4/70-12/98 IBM, Essex Junction, Vermont
Hired into IBM April 1970 and have had various assignments in memory chip design on both static and dynamic memory, logic, automated logic wiring, alterable logic, and alterable memory devices. Initially did the original work on one device DRAM memory chips for 1K, 2K, and the 8K, which was presented in 1973 at the ISSCC. Other activities, over the years, included work on automated wiring, simulation and checking programs for both logic and memory card design; silicon rich oxide and silicon rich nitride alterable devices used as both memory or logic; and design efforts and consultation on 1M, 4M, 16M, 256M, 1G, 4G and 16G DRAM cells, test sites and product designs. Over the last several years have lead the work on an ASIC library embedded DRAM macro and the concept of precision align macros for enhanced productivity. Awarded the distinction of IBM Fellow in IBM June 1990.
1/66-4/70 University of Florida, Gainesville, Florida
Teaching Assistant under Professor Nelson Rosier and Dr. Gene Chenette on pulse and digital circuit design and noise studies.
1964-4/66 Martin Marietta, Orlando Florida
Co-op student under Richard A. Branham on frequency time multiplexed troposcatter digital communication systems.

Professional Affiliations and Activities:
IBM Academy of Technology, 1990-1998
ISSCC Technical Committee, 1992-1994
Symposium on VLSI Circuits , 1995-1998
Guest Editor of JSSC, November 1993
Evening Panel participant and evening panel organizer many times at the ISSCC and the
Symposium on VLSI Circuits
Vermont Academy of Science and Engineering, 1997-present

Honors and Awards:
IEEE Fellow January 1997 for Contributions to the Development of DRAM
P.K. McElroy Award for the best paper at the 1991 Reliability and Maintainability Symposium
JSSC 1989-90 Best Paper Award from the Solid State Circuits Council
IBM Corporate Award Nov 1987, Product Design and Development of a Silicon Gate 1 Megabit
Random Access Memory
IBM Corporate Award June 1983, 144K C/P ROS Design and Leadership
IBM Corporate Award June 1978, Advances in the Art of Stored Charge Sensing

Publications:
Author or co-author of many conference papers and special tutorials, 22 publications in reviewed technical journals, 52 publications in the IBM technical disclosure bulletin.

Patents:
61 US Patents issued on semiconductor processes, circuits and systems