In the interest of clarity…

Q1. 1.15 (page 67)

[15/10] Assume that we make an enhancement to a computer that improves some mode of execution by a factor of 10. Enhanced mode is used 50% of the time, measured as a percentage of the execution time when the enhanced mode is in use. Recall that Amdahl’s law depends on the fraction of the original, unenhanced execution time that could make use of enhanced mode. Thus, we cannot directly use this 50% measurement to compute speedup with Amdahl’s law.

a. [15] What is the speedup we have obtained from fast mode?

b. [10] What percentage of the original execution time has been converted to fast mode?

Q2. Consider the following fragment of code

L.D     F4, 0(R2)  
MUL.D   F0, F4, F4  
MUL.D   F8, F0, F6  
ADD.D   F8, F4, F4  

Assuming that hazards are dealt with in the ID stage (making necessary stalls to avoid any hazards), show the clock cycle chart when this is executed (under the same assumption as Section C.5 “Extending the MIPS Pipeline to Handle Multicycle Operations”)

Q3. Consider the following fragment of code

LD  R1, 0(R2)  
ADD R4, R1, R5  
ADD R5, R4, R4  
ADD R6, R2, R3

a) show the clock cycle chart assuming no forwarding, i.e., register values are communicated via register file. Remember: WB first half write, second half read

b) show the clock cycle chart assuming there is forwarding.

Q4. Consider the following fragment of code

L.D    F6, 34 (R2)  
L.D    F2, 45 (R3)  
MUL.D  F0, F2, F8  
DIV.D  F4, F0, F10  
ADD.D  F10, F12, F12  
ADD.D  F12, F8, F2

Assuming it is executed on a CDC 6600 (C.7 “Crosscutting Issues”). Show the clock cycle chart, and give the register result status table at the end of clock cycle 20 and 40.